HierCIM: A 16-Kb SRAM-Based Digital CIM Macro With Hierarchical Adder-Tree Accumulation for Edge CNN Inference
The growing demand for efficient deep-learning inference on edge platforms requires hardware that is both energy-efficient and practically implementable. This work presents a 16-Kb all-digital static random-access memory (SRAM)-based compute-in-memory (CIM) macro for low-bit CNN inference, featuring a hierarchical adde...