Chenglong Sun

A novel simulated annealing based mapping for hybrid NoC-enabled DNN accelerators

With the continuous development of very large-scale integration (VLSI), the number of cores integrated on a single chip has reached hundreds. Network-on-Chip (NoC), featuring a highly scalable and high-bandwidth communication architecture, has been widely applied in Chip Multiprocessor Systems (CMP). NoC-based deep neu...