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Chu-Liang Lee

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Open access Sep 2026

Integration of Multiplication and Floating-Point Extensions in Risc-V: Design and Synthesis

This project involves the design and implementation of the multiplication (M) and floating point (F) extensions and their integration with the base RV32I processor in forming an RV32IMF processor. The multiplication and division unit (MDU) and floating-point unit (FPU) are designed to support these extensions. The MDU...

Chu-Liang Lee, Tasigen Visvanathan, K. Chan et al. · 0 citations

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