Author

Debjit Pal

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Jul 2026

ADVERSARIAL: And-Inverter Graph-Assisted Hardware Trojan Detection At Scale

Modern System-on-Chip (SoCs) often contain hundreds of millions to tens of billions of gates, making existing Hardware Trojan (HT) detection methods impractical due to their immense scale. The proposed approach incorporates symbolically enabled learning by modeling flattened gate-level netlists as Boolean networks repr...

Yaroslav Popryho, Debjit Pal, Inna Partin-Vaisband · arXiv.org · 0 citations

Preprint Aug 2026

BOOSTEDSOSA: Accelerated Inferencing for Low Variance Stochastic Online Scheduling

BOOSTEDSOSA is introduced, a dual-FPGA ML-assisted Scheduling architecture that integrates a Machine Learning predictor for expected processing times, with a novel temporal-aware training policy, enabling its use in existing HPC systems.

Adam H. Ross, Riccardo Revalor, Aryan Singh et al. · 0 citations