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Open access
Sep 2026
MeshRT: Compile-Time Governed Wafer-Scale Runtime for Low-Latency High-Throughput Inference
Wafer-scale accelerators promise ultra-low-latency AI inference, but current system stacks still carry an unsustainably high cost premium. The reason is that many current and emerging inference techniques, such as batching and MoE, introduce runtime dynamism that existing wafer-scale systems cannot support efficiently....
Cong-Jie He, Le Xu, Zhan Lu et al.
· Proceedings of the ACM SIGOP... · 0 citations