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Author

Hiroshi Sasaki

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Open access Sep 2026

Exploiting Decompression Latency for Covert Channels in Inter-Line-Compressed LLCs

The recently proposed XOR cache is an inter-line-compressed last-level cache (LLC) that leverages the data-inclusion relationship between the private caches and the LLC, compressing two cache lines into one by XORing them. The architecture relies on the cache coherence protocol for data decompression. In this paper, we...

David K. Oh, Hiroshi Sasaki · 0 citations
Open access Sep 2026

Improving Indirect Branch Prediction in Interpreters via Hardware/Software Co-Design

Interpreters have a large indirect-branch footprint, requiring large predictor capacity for accurate prediction. We propose a hardware/software co-design in which a hardware lookahead engine, running ahead of the pipeline with software-provided bytecode metadata, supplies interpreter dispatch targets to the frontend. T...

Lin-Feng Zheng, Hiroshi Sasaki · 0 citations

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