Sep 2026
Design Space Exploration of Accelerating Monolith Hash on Hardware for STARK
This work presents a hardware-oriented design for accelerating the Monolith hash function on FPGA and proposes a dual-architecture framework consisting of a serial architecture and a parallel architecture to address different performance and resource constraints.
Cheng Chen, Gang-Qiang Yang, Hong-Chao Zhou et al.
· ACM Transactions on Reconfig... · 0 citations