Author

Jianwen Xian

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Preprint Aug 2026

TEMPO: Makespan-Aware Expert-Parallel Load Balancing Across Memory- and Compute-Bound Regimes

This work formalizes per-batch dispatch as a fixed-charge makespan problem---NP-hard on two fully replicated GPUs, polynomial in degenerate limits---and presents TEMPO, a makespan-aware dispatcher solving it in milliseconds off the critical path; its SGLang integration runs out-of-process and fuses dispatch with count...

Jie Li, Chen-Xin Jia, Jinliang Shen et al. · 1 citation

Jul 2026

X-Stage: An Overlooked Pipeline Stage for Communication-Computation Overlap in DiT Inference

A lightweight Burst-Gap model parameterized by backpressure-free issue time, effective drain rate, and outstanding capacity predicts issue overhead, recovery between bursts, and the onset of backpressure, and two communication-computation fused kernels are redesigned.

Jianwen Xian, Zhiyuan Xu, Yucheng Li et al. · arXiv.org · 0 citations