LevelSyn: Physical-Aware Logic Synthesis via Level-Asynchronous Graph Neural Networks
LevelSyn is a novel physical-aware logic synthesis framework that integrates hierarchical representation learning with a wirelength-driven optimization engine that significantly outperforms state-of-the-art methods on the EPFL benchmark suite.
Jing-Yi Zhou, Zhengyuan Shi, Zi-Yang Zheng et al.
· 0 citations