Fault-Tolerant Topology Reconfiguration Framework for NoC-Based Multiprocessor Arrays via Bipartite Matching and Reinforcement Learning
As Network-on-Chip (NoC)-based multiprocessor arrays continue to scale, permanent faults in processing elements (PEs) increasingly jeopardize system reliability and performance. Topology reconfiguration has become a critical mechanism to tolerate such faults by restoring logical interconnects. However, existing heurist...