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Lu-Qiao Liu

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Open access Sep 2026

Hardware Acceleration of Stochastic Neural Networks Enabled by Bit‐Cell Level Co‐Design of Magnetic Tunnel Junctions

ABSTRACT Processing‐in‐memory architectures mitigate data shuttling bottlenecks in deterministic AI workloads, but still depend on costly external entropy sources for probabilistic models. Here, we present a magnetic‐tunnel‐junction‐based processing‐in‐memory architecture that unifies data storage and massively paralle...

Qiu-Yuan Wang, Dooyong Koh, B. McGoldrick et al. · 0 citations

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