Preprint
Aug 2026
FinHardBench: Can LLMs Generate Latency-Aware Hardware for Financial Computing?
Can large language models generate not just correct, but fast hardware? This paper investigates the question in financial FPGA design, where 5-10 nanoseconds of latency determines competitive advantage and designs iterate continuously as protocols, strategies, and regulations evolve. FinHardBench, a benchmark of 33 fin...
Weimin Fu, He-Jia Zhang, Ming-Hao Shao et al.
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