Author

Ruogu Chen

2 papers indexed here

We haven’t gathered this author’s papers yet. Follow them and we’ll fetch their work.

Not the right person? Other researchers publish under this name.

Preprint Aug 2026

PPAPlace: Differentiable Cross-Stage Objectives for Chip Placement Optimization

Macro placement significantly affects a chip's post-route performance, power, and area (PPA). Most placement methods optimize half-perimeter wirelength (HPWL) as the primary objective. However, recent benchmarking shows a near-zero correlation between HPWL and post-route timing metrics such as the worst negative slack...

Ruogu Chen, Jie Han · 0 citations

Jul 2026

CoEvoP&R: Co-Evolving Placement Objectives with Routing Feedback via Large Language Models

CoEvoP&R addresses limitations with a large language model (LLM)-based framework that automatically evolves analytical placement objectives and reduces post-route routed wirelength and congestion across eight ChiP-Bench Nangate45 designs and three seeds.

Ruogu Chen, W. Xiao, Ramesh Karri et al. · arXiv.org · 0 citations