S. L. Sangam

Design of a 1-bit Adder/Subtractor Using Multi-Gate Transistors for High Speed and Low Power Applications

Compact and energy-efficient adder and subtractor circuits are the basic building blocks of the arithmetic circuits. This work presents the conceptual design of a 1-bit adder/subtractor using four Functionally Programable Logic cells (FPLCs). Each FPLC is realized using non aligned multi-gate field-effect transistors (...