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Author

S. Menzel

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Preprint Sep 2026

OTTER - Two Transistor - One RRAM Architecture for Reliable In-Memory-Computing in 28 nm CMOS Technology

This work presents OTTER, a 28 nm CMOS platform co-integrated with TaOx-based valence-change mechanism (VCM) RRAM, demonstrating a two-transistor-one-memristive-device (2T1R) architecture for reliable in-memory computing. The 2T1R cell combines a low-drive-current (LD) transistor and a high-drive-current (HD) transisto...

Yang Chen, Daniele Storelli, Xin-Yi Zhao et al. · 0 citations
Open access Aug 2026

Reliability challenges for resistive random-access memory-based parallel logic computing

Conventional computing architectures are reaching their scalability limits, while their energy demands increase rapidly. A bottleneck is the separation of memory and processing units, which requires a continuous data transfer. This memory wall increases the power consumption and limits the processing speed at the same...

L. Brackmann, Tobias Ziegler, N. Kopperberg et al. · 0 citations

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