Sharjeel Imtiaz

AutoTrans: AI-Assisted Automatic Translation of Security Assertions for RISC-V Processors

Reusing a set of verified security assertions across RISC-V processor targets remains one of the most expensive bottlenecks in hardware security verification. Manual translation takes hours per assertion. Raw LLM translation is fast but unreliable, introducing signal hallucination, where the model invents port names ab...