Author

Xiang Chen

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#software testing Preprint Aug 2026

Unsaid, Unsafe? Implicit Security Obligations in LLM-Based RTL Code Generation

RTL-Obliger is presented, a neuro-symbolic framework that infers implicit security obligations of register-transfer-level RTL in a functionality-preserving two-stage generation and raises mean all-pass rates.

Guang Yang, Xing Hu, Xiang Chen et al. · 0 citations

#artificial intelligence Review Open access Oct 2025

Large Language Model for Verilog Code Generation: Literature Review and the Road Ahead

This review provides a systematic literature review of LLM-based Verilog code generation, analyzing 102 papers (70 published and 32 high-quality preprints) from SE, AI, and EDA venues and outlines a roadmap highlighting potential opportunities in LLM-assisted hardware design.

Guang Yang, Wei Zheng, Xiang Chen et al. · ACM Computing Surveys · 11 citations · ⚡1