Author

Xiao-Lin Xu

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Preprint Sep 2026

FASTAR: FRI Accelerator for Scalable Transparent ARguments of Knowledge

This work proposes FASTAR, a novel FPGA-based accelerator for the FRI protocol, which is implemented with High-Level Synthesis (HLS) and composed of fully parameterizable building blocks for the major stages of FRI, including polynomial evaluation, recursive split-and-fold, and Merkle-tree construction.

Teng-Kai Gong, Xiao-Lin Xu · 0 citations