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Author

Yuan-Liang Chen

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Preprint Sep 2026

VSpector: Specification-Driven Bug Detection for RISC-V CPUs

VSpector is presented, a specification-driven bug detection pipeline that directly checks whether CPU register-transfer level (RTL) implementations adhere to official specification rules, without requiring specialized construction of reference models, formal properties, or custom bug patterns.

Tian-Yu Jia, Zhao-Yang Yu, Yuan-Liang Chen et al. · 0 citations
Book Open access Jul 2026

Shark2Pit: Automated Test Template Generation for Protocol Fuzzing Based on Packet Parser

Shark2Pit is an automated tool that generates Pit files from network traffic that uses Tshark to parse traffic, extract protocol metadata, and construct data models, and combines these models with predefined configurations to generate a Pit file.

Yu-Lai Fu, Yuan-Liang Chen, Fu-Chen Ma et al. · 0 citations

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