A hardware-algorithm co-design framework that leverages analog in-memory computing and hyperdimensional computing for efficient language identification at the edge by exploiting the inherent randomness and multistate properties of analog memristors to implement a vector matrix multiplication-based language feature encoding with much reduced hardware complexity.
Abstract
Deploying large-scale artificial intelligence models for language processing on edge devices is limited by constraints in computational capacity and energy efficiency. To address this challenge, we present a hardware-algorithm co-design framework that leverages analog in-memory computing and hyperdimensional computing for efficient language identification at the edge. By exploiting the inherent randomness and multistate properties of analog memristors, we implement a vector matrix multiplication-based language feature encoding with much reduced hardware complexity. Language classification is then realized with a single-layer perceptron on analog memristive crossbar arrays, eliminating inter-layer activation functions and backward propagation during training that are required in deep neural networks. Experimental implementation on a multicore memristive system-on-a-chip demonstrates a 90% reduction in hardware resources while achieving 95.24% language identification accuracy, the highest reported among hyperdimensional computing implementations on emerging hardware platforms. This work provides a scalable, energy-efficient approach for high-accuracy language processing on edge devices. Energy-efficient, high-accuracy language processing on edge devices is currently constrained by limited computational capacity. Huang et al. propose a hardware–algorithm co-design that implements a vector–matrix multiplication-based language feature encoding with significantly reduced hardware complexity.
The exciting potential of memristor-based components of neuroelectronics as the building blocks for a new era of artificial intelligence hardware, capable of surpassing current computational limitations, as well as their role in the ongoing transition to hybrid intelligence based on the symbiosis of electronic and biol...
A. Mikhaylov, S. Shchanikov, M. Koryazhkina et al.· Electronics· 0 citations
Moving data between memory and processing units has become a major cost in neural network computing. Memristive crossbars address this cost by retaining model parameters as conductance states and performing parallel multiplication and accumulation within the array. This review examines how that physical operation is tr...
Chao-Yang Dong, Xuan Xie, Jian-Jun Chen et al.· Electronics· 0 citations
The escalating computational demand of modern AI is increasingly constrained by the data-movement overhead of von Neumann architectures, motivating memristor-based compute-in-memory (CIM) as an energy-efficient alternative. Yet extending CIM to reliable analog computation remains difficult because practical memristor a...
Yi-Fei Yu, Ji-Chang Yang, Zi-Jian Ye et al.· npj Unconventional Computing· 0 citations
A comprehensive hardware-aware design framework for systematically mapping algorithmic workloads onto IMC architectures, using the discrete Fourier transform (DFT) as a case study and a novel mapping scheme that reduces energy consumption per computation by 53% compared with conventional mapping techniques is introduce...
Sofia Tatidis, P. Nielsen, Liang Liu et al.· 0 citations
Memristor crossbar-based analog computing architectures have emerged as promising candidates for energyefficient in-memory computing due to their high integration density and parallel computing capability. However, leakage and sneak path current in the memristive crossbar remain a critical challenge that affects the ac...
Muhammed Rahees A, Rose Mary Kuruvithadam, Antony Sharon et al.· International Symposium on V...· 0 citations
A probabilistic graphical computing paradigm based on memristors is reported, which not only unifies the framework of Bayesian inference-based baseband signal processing algorithms, but also achieves a substantial improvement in energy efficiency via memristor-based in-memory computing.
Chun-Xiao Jiang, Jia-Wei Wang, Zhou-Jie Pan et al.· Nature Communications· 0 citations
We use cookies to run the site and, with your consent, for analytics and to show ads.
See our Cookie Policy.