Pushing the Limits of Computing: Transistor-to-Processor Benchmarking at 77 K With Self-Heating Effect

Abstract

Owing to increased power density with each newer technology node, transistors suffer from increased Self-Heating (SH) at room temperature, which is a daunting challenge for circuits and processors’ reliability. Given the increasing interest in leveraging cryogenic temperatures to enhance the performance and energy efficiency of computing systems, understanding SH effects at cryogenic temperatures is critical for the reliability and optimization of such systems. This work presents a comprehensive investigation of SH effects from the transistor to the processor level on the advanced 5 nm FinFET node under cryogenic conditions, specifically at 77 K. Further, it presents a pioneering comparison of SH effects between 5 nm FinFET and 28 nm FDSOI transistors at 77 K. Our findings reveal that FinFET devices on bulk substrate, despite their 3D-confined structure and reduced scale to extreme 5 nm, exhibit better thermal characteristics compared to FDSOI devices at 77 K. This is primarily attributed to the inherent design of FDSOI devices, where the buried oxide layer acts as a thermal barrier, thereby significantly restricting heat dissipation. Further, we explore the standard cell libraries and a processor core operating at 77 K with and without i) SH effect and ii) scaled parasitic resistance using 5 nm FinFETs. The exploration undertaken in this study not only demystifies the thermal behavior of a cutting-edge 5 nm technology under extremely low temperatures but also establishes a new paradigm in selecting technologies for future high-performance computing applications at cryogenic temperatures. It opens new avenues for the development of more efficient and reliable computing systems, paving the way for future innovations in cryogenic computing.