DDRop: Active Memory Interposer Attacks on Confidential VMs by Dropping DDR5 Writes

Compute eXpress Leak: New Cache Attacks Using CXL Devices

SnoopDog is presented, a forward-looking cross-host timing attack that distinguishes whether a cache line is privately owned by another host based on access latency, and end-to-end cross-host side-channel attacks, including recovery of tokens from large language model inference when model weights are shared across host...

Remote-Timer-as-a-Service: Efficient Microarchitectural Leakage in the Cloud with Remote Timers

A remote Spectre attack that leaks a JWT token from a co-located victim worker in the Cloudflare Workers production environment is demonstrated, outperform the existing attack by orders of magnitude.

MixSan: Enhancing Address-Based Memory Sanitizers with Fused Metadata and Hybrid Detection

MixSan, a prototype built on RangeSanitizer (RSan), stores the same identity tag in pointer high bits through Intel Linear Address Masking (LAM) U57 and validates both the tag and the spatial bound with a unified 3-ALU-op check.

Full Key Recovery of Masked PRESENT on an Out-of-Order RISC-V Processor: A First Reported Case Study

JITterFlip: Uncovering Fault Attack Surfaces in JIT-Compiled LLM Serving

JITterFlip is presented, the first BFA targeting the host-side JIT serving control plane of GPU-based LLM inference, and develops a decision-guided fault-vulnerable code analysis that enables both gibberish output generation and a correct-output sponge attack.

FORTE: Fault-tOlerant RISC-V with Trusted Enclaves

To the knowledge, this represents the first open-source RISC-V processor that is both Linux-capable and specifically targeted at booting the Keystone framework, including adapting Keystone software to the authors' platform, while simultaneously addressing hardware-level faults.