A Generic Ladder-Based Benchmark for Comparative Evaluation of PLC/PAC Processing Performance and Timing Stability

Abstract

Industrial controller selection for automation, cyber-physical systems, and energy management applications requires objective evidence of processing performance, timing stability, and execution repeatability before application-specific deployment. However, existing studies typically address controller benchmarking, communication performance, energy management system (EMS) validation, and hardware-in-the-loop (HIL) or power hardware-in-the-loop (PHIL) assessments separately, without providing a simple Ladder-based procedure for preliminary comparison of heterogeneous controller platforms using only benchmark software and candidate hardware. This paper proposes a generic Ladder-based benchmark for programmable logic controllers (PLCs), programmable automation controllers (PACs), virtual PLCs, and other Ladder-compatible industrial controllers. The method combines two execution variants: a multitask implementation for PAC platforms with a 10 ms timing-reference task and a continuous scan-counter task, and a single-scan adaptation for conventional PLCs. From repeated executions under the same workload, the benchmark derives comparable key performance indicators, including scan count, estimated scan time, timing discrepancy, relative jitter, repeatability, and a conservative normalized processing score. Experimental results show that the method clearly differentiates controller classes, central processing unit (CPU) families, firmware versions, and an emulated environment. Within the evaluated hardware set, PAC-class platforms achieved substantially higher processing capability and lower estimated scan times than the tested PLC-class devices. The proposed method provides a reproducible and vendor-independent basis for preliminary hardware screening prior to application-level validation.