Lexicographic Energy-Efficient Scheduling in Semiconductor Assembly and Test Hybrid Flow Shops

Abstract

: The hybrid flow shop scheduling problem (HFSP) is a widely used model for energy-efficient multi-stage manufacturing, yet semiconductor studies rarely combine discrete assembly and packaging, batch burn-in processing and speed-adjustable testing within a single four-stage formulation. Most also treat energy consumption as a Pareto trade-off with time-related objectives, which is less suitable for make-to-order production, where late delivery can cause revenue loss and customer attrition. This study addresses both gaps. A four-stage Mixed-Integer Linear Programming (MILP) model determines job sequencing, machine assignment, burn-in batch formation and final-test speed selection under a lexicographic objective that minimizes total tardiness (TT) before total energy consumption (TEC). An Extended Teachers’ Teaching-Learning-Based Optimization (E-TTLBO) algorithm is proposed with a four-string chromosome encoding and a greedy batch-packing decoder that constructively enforces oven-capacity feasibility during the search. Its performance is benchmarked against MILP solutions generated by IBM ILOG CPLEX Optimization Studio on small-scale instances, with optimality certified for a subset of cases. Across 18 instance configurations with 5 to 100 jobs, the proposed algorithm achieves an LR of at least 80% in 17 configurations against the Lexicographic Genetic Algorithm (Lex-GA) and in 16 configurations against Simulated Annealing (SA). In Phase 2, E-TTLBO lowers TEC by 8.8% to 21.7% relative to the Phase-1 tardiness-minimizing schedule, averaged over ten replications per configuration, with no increase in tardiness in any of the 180 runs. The average solution time remains below 110 s for the largest tested instances. These results indicate that energy savings from speed reduction and batch consolidation can be achieved without compromising delivery performance in semiconductor production.