Sense-Now Reconstruct-Later : An Analog In-memory Compression and Non-volatile Storage Paradigm for Always-ON Sensing

Abstract

In this paper, we describe a system-on-chip (SoC) architecture that can be used to address both the information and energy bottlenecks for in-sensor compute platforms. The architecture is based on a sense-now reconstruct-later paradigm, where compression and non-volatile storage of sparse events are achieved using an array of ultra-linear floating-gate injectors. A 256-length linear feedback shift register (LFSR) is used for energy-efficient generation of the time-varying random measurement or encryption matrix, and the floating-gate injector array is used for in-memory time-domain multiply-accumulate operation. The cumulative statistics stored on the injector array are retrieved for an offline reconstruction of the time-encoded sensor signal. In this paper, we highlight different performance trade-offs between the linearity, the resolution of non-volatile storage, and the reconstruction accuracy. Measured results using prototypes fabricated in a standard CMOS process demonstrate sensing, compression, encryption and storage at nano-watt power dissipation levels, which makes the system attractive for long-term, battery-powered sensing and data-logging of rare events.