DC–DC Step-Down Converter With Reduced Voltage Stress for High Frequency Operation

Abstract

This paper presents the concept of a dc–dc step-down converter for low-voltage applications that features low switching and conduction losses. The topology of the converter contains an input voltage divider composed of three capacitors so that the voltage stress across the transistors is reduced in relation to the input voltage, which limits the switching losses. Furthermore, the proposed converter modulation requires a limited switching frequency for hard switching transistors. Conduction losses were reduced by conducting branches with synchronous transistors in parallel. The proposed system is a non-isolated step-down converter, and the article presents the results of its research on operation with typical conversion ratio values such as 48V-to-12V, 48V-to-5V, and 24V-to-5V. This article presents the concept of the converter and its modulation, in-depth simulation of component stress, efficiency, and loss breakdown, as well as experimental results in a GaN-based design optimized for high-frequency operation with low inductance and volume of an inductor.