Dynamic on-resistance degradation mechanism and suppression methods for 1200V GaN high-voltage power devices

Abstract

With the evolution of power electronic system to high frequency and high efficiency, the degradation of dynamic onresistance of 1200V gallium nitride devices has become a key technical bottleneck restricting its reliability. This article focuses on this problem, aiming at revealing the dynamic mechanism of carrier capture under high pressure stress and establishing a predictable dynamic characteristic model. By combining Technology Computer-Aided Design (TCAD) numerical simulation with Direct Current (DC) pulse test technique, the influence of surface interface state and deep level trap on two-dimensional electron gas is analyzed. On this basis, a compact circuit model integrating physical mechanism and optimization algorithm is constructed, and the improved adaptive genetic algorithm is used to realize multi-parameter joint optimization. The key indicators such as trap time constant and concentration are successfully extracted, and the average fitting accuracy is over 95%. Design an active suppression scheme combining field plate structure optimization and bipolar pulse drive in the research, and build a low inductance high-speed testing platform for multidimensional verification. The experimental results show that the proposed suppression strategy reduces the cumulative degradation rate from 15% to 6% after 100000 cycles, Atomic Layer Deposition (ALD) passivation treatment reduces the degradation rate by 40%, and the resistance fluctuation under high temperature conditions is controlled within 5%. This study establishes a complete technical roadmap from micro mechanisms to macro models, providing support for the engineering application of wide bandgap semiconductor devices.