A Configurable Unified Architecture of Multi-Mode PUF and TRNG Based on Modified Galois Ring Oscillator

Abstract

The explosive growth of the Internet of Things (IoT) and edge computing imposes stringent constraints on hardware resources, making traditional isolated security primitives prohibitively expensive. To address this challenge, this paper proposes a configurable unified hardware security architecture based on a Modified Galois Ring Oscillator (MGARO). By deeply reusing the physical entropy source, the design unifies Physical Unclonable Function (PUF) and True Random Number Generator (TRNG) functionalities. A novel triple comparison and XOR compression network acts as an intrinsic spatial decorrelator, generating high-quality PUF responses without complex post-processing. Concurrently, a time-sliced dynamic polling mechanism relaxes the throughput-entropy trade-off for TRNGs, achieving linear throughput amplification. Evaluations on Xilinx ZYNQ-7010 FPGAs demonstrate a PUF uniqueness of 48.91%, nominal-condition stability of 98.95%, and uniformity of 48.26%. Furthermore, the TRNG bitstreams pass the NIST SP 800-22 statistical tests, indicating this multi-mode architecture can provide an efficient, robust root of trust for edge devices.