Lightweight Cryptographic VLSI Design for Secure Industrial IoT Device

Abstract

This paper introduces a low-power and low-area cryptographic VLSI architecture for secure Industrial Internet of Things (IoT) devices with tight power, area and latency constraints. Our design combines a low-power encryption module with efficient datapath and control logic to provide high security with a low resource footprint. Through the use of lightweight symmetric cryptographic algorithms and resource reuse strategies, the design offers lower gate count and higher throughput than traditional designs. Particular emphasis is placed on protection against typical hardware attacks, such as side-channel and fault injection attacks, to enhance trustworthiness in industrial settings. The proposed design is implemented and analysed in standard CMOS technology, showing considerable gains in power, area and performance. This research fills the gap in the need for secure, affordable, and scalable hardware architectures for IoT applications by being deployable in constrained edge devices in smart manufacturing and automation systems. The proposed method achieved 12.5 mW of power consumption.