A Study on Stochastic Number Systems and Computing Architectures for Low-Power and Fault-Tolerant VLSI Systems
Abstract
This paper aims to showcase an in-depth study of a stochastic system that could be used in complex systems rather than going for traditional methods. A stochastic system works with an approximation technique where exact accuracy may be moderately compromised compared with a conventional binary system, but even though we could receive an acceptable accuracy with low power, lower delay and lower area consumption VLSI metrics. Stochastic Computing (SC) has emerged as an effective approximate-computing architecture for energy- and area-constrained systems, especially in error-tolerant applications such as signal processing, error-correcting codes, and neural networks. This paper surveys recent advances in stochastic and hybrid SC architectures, focusing on accuracy, correlation management, latency reduction, fault tolerance, and FPGA/ASIC realizations. Key challenges—long bit-streams, SNG overhead, correlation-induced errors, and binary–stochastic conversion costs—are reviewed, along with techniques that exploit correlation as a design resource. Hybrid stochastic logic and multibit representations are analyzed for mitigating precision and latency limits while preserving robustness and managing the power-area-delay constraints. Application-driven designs, including LDPC decoders, stochastic inner products, FSM-based fault-tolerant SC, and fully hardware SCNNs, demonstrate significant gains in throughput, area efficiency, and transient-fault resilience. The study indicates that modern stochastic and hybrid stochastic computing architectures can achieve near-binary accuracy with substantially reduced hardware cost and power consumption thereby reducing the overall delay when carefully designed. The paper concludes by outlining open research challenges and future directions toward scalable, high-accuracy, and application-specific stochastic computing systems for emerging edge and near-sensor platforms. The survey further highlights emerging trends such as adaptive precision, reusable stochastic number generators, and correlation-aware synthesis for improved scalability. Comparative analysis reveals key trade-offs among accuracy, latency, and hardware efficiency. A brief on stochastic computing works, challenges and observations on future scopes are portrayed in this study.