Gap-Aware Candidate Reranking for Multi-Strategy VLSI Floorplanning: A Metric-Calibration Study on the FloorSet Benchmark

Abstract

Multi-strategy very-large-scale integration (VLSI) floorplanners combine heterogeneous candidate generators (shelf packing, sequence-pair simulated annealing, analytical placement, and learned neural priors) and select among them using an internal ranking cost. In such pipelines, the choice of that ranking cost is an important but under-analysed design decision. We frame this paper as a benchmark-specific study of metric-faithful candidate selection on FloorSet. We show that a widely used raw-magnitude ranking cost is systematically mis-calibrated with respect to the benchmark’s gap-based contest metric, causing the solver to discard low-wirelength candidates for reasons unrelated to the final score. We therefore introduce a gap-aware reranker that operates on percentile-normalised half-perimeter wirelength and area statistics, together with a constraint-aware violation proxy that mirrors the contest’s exact soft-violation denominator. Integrated into a multi-strategy solver that includes Diffusion Transformer (DiT) candidate generators, this reranker improves the composite contest score on the full 100-case validation set from 1.43 to 1.40228 (1.94% relative reduction). Because no external system reports results on FloorSet, this improvement is measured against a raw-magnitude selection baseline constructed inside our own solver; we therefore validate it with a controlled same-pool protocol in which both selection rules choose from identical candidate pools, and the official evaluator scores every candidate. Under this protocol the improvement is consistent across independent runs and statistically significant under a paired Wilcoxon signed-rank test, the calibration mismatch is confirmed in aggregate across all 100 instances rather than on a single trace, and exact frozen-pool replays show the result is insensitive to the rerank percentile across its entire range, ruling out percentile tuning as a source of the improvement. As supporting engineering adaptations, we report two DiT-guided candidate-path variants that broaden the candidate pool, and a tiered stochastic sampling schedule that reduces end-to-end evaluation wall-time by 39% with no score loss. A cross-benchmark evaluation on the polygonal FloorSet-Prime test set, using the same solver with no hyperparameter re-tuning, yields $S_{100}=1.54862$ with $91/100$ instances feasible, suggesting that the rerank and runtime-design choices remain effective on a distinct problem class. Finally, we characterise the residual error as an empirical two-regime candidate structure, in which learned priors produce low-wirelength / higher-violation candidates while classical packers produce higher-wirelength / lower-violation candidates, and present controlled negative results for a scaled-up DiT variant and an unbounded analytical-placement path that help explain this remaining performance bottleneck.