Real-Time Highlight Reconstruction for Dual- Exposure RAW Video Streams on an FPGA

Abstract

This paper presents a one-pass fixed-point FPGA front end for highlight reconstruction in IMX294 dual-exposure Bayer RAW video. Paired RAW samples are processed before demosaicing without a frame-wide buffer, giving deterministic pipeline delay. The design contributes: (1) register-configurable saturation detection and short-exposure scaling; (2) a transparent four-lane MIPI CSI-2 sensor-to-SoC path with DDR3/HDMI debug support; and (3) a 4K 30 frames/s bandwidth analysis and synthetic RAW-like evaluation. Saturated long-exposure samples are replaced by scaled short-exposure samples and repacked as RAW. For RAW10, the paired payload is $4.977 \mathrm{~Gb} / \mathrm{s}$, or $72.0 \%$ of the 6.912 Gb/s link capacity. Across five scenes, average PSNR increases from 27.64 to 38.22 dB, a 10.58 dB gain, and mean highlight recovery reaches $89.58 \%$. The method therefore provides a compact, low-latency pre-ISP correction stage for embedded cameras.