Noise-Aware Compilation for Heterogeneous NISQ Hardware: A Cross-Topology Empirical Study

Abstract

Noisy Intermediate-Scale Quantum (NISQ) processors exhibit substantial heterogeneity in their per-edge twoqubit gate error rates, with current-generation devices showing more than two orders of magnitude variation across their coupling map. An empirical cross-topology study of qubitmapping strategies is presented for four IBM fake backends, characterizing (i) the magnitude of calibration heterogeneity, (ii) the performance of vanilla SABRE relative to a multi-start noise-aware initial-layout selector, and (iii) the success probability decay of statically-compiled circuits under simulated calibration drift. SABRE is shown to achieve up to 74.6% CX reduction over naive routing on the largest backend evaluated. The noise-aware selector is observed to tie or marginally trail vanilla SABRE's VF2PostLayout in static-calibration evaluation, indicating that Qiskit's mature pipeline is competitive with direct error-weighted graph expansion. Drift sensitivity analysis demonstrates that statically-compiled QFT circuits lose 6-17% of their estimated success probability at high drift severity $(\sigma=0.8)$, with the noisier T-shape backend most affected. The findings highlight the parameter space where drift-aware compilation methods would be most valuable, rather than evaluating an active driftcompensation compiler.