Hybrid Signed Mac-Driven Stochastic Squeezenet for Hardware-Constrained Neural Network Inference

Abstract

Deep neural networks (DNNs) achieve high accuracy in image classification tasks. However, their high computational and hardware demands make them difficult to deploy on resourceconstrained edge devices. To address this challenge, this work proposes a Stochastic SqueezeNet architecture that integrates hybrid multiply-accumulate (MAC) units with stochastic computing techniques to improve hardware efficiency while maintaining classification performance. In stochastic computing, numerical values are encoded as probabilistic bitstreams, enabling complex arithmetic operations to be implemented using simple logic elements such as AND/OR gates and multiplexers. Leveraging this representation, the proposed architecture reduces computational complexity at the hardware level. The design is evaluated on the MNIST Digits dataset with an input resolution of $\mathbf{2 8} \times \mathbf{2 8}$, achieving a classification accuracy of 98.4%. The proposed approach reduces lookup table (LUT) usage by 53.5% and DSP usage by 95.9% compared to standard SqueezeNet implementations with similar layer configurations. The findings establish the proposed approach as a compelling solution for resource-efficient deep learning deployment.