Aug 2026· Midwest Symposium on Circuits and Systems· pp. 693-697· 0 citations· 9 references
Abstract
This work presents AnalogMind, a tool-augmented pipeline for analog circuit design, optimization, and education. The system accepts design specifications through natural language or configuration files, compiles them into parameterized SPICE netlists, and evaluates designs using closed-form equations, CMA-ES optimization, Pareto NSGA-II multi-objective search, and Monte Carlo yield analysis. A hardware prototype validates simulation results against a physically tunable Sallen-Key low-pass filter controlled by an STM32 microcontroller. Benchmarked against GPT-4o, GPT-4omini, and Claude Sonnet 4.6 on 87 circuit design tasks, AnalogMind achieved an 80.5% pass rate compared to a next-best of 36.8%, demonstrating that a simulation-backed pipeline significantly outperforms general-purpose LLMs on analog circuit design tasks.
An open-source end-to-end multi-agent LLM workflow that takes user specs as input and outputs the appropriate netlist, encompassing both topology generation and circuit sizing, and achieves a figure of merit (FoM) comparable to that of known topologies, and up to 3x higher for certain circuits.
A low-power design for an accuracy-controllable multiplier whose final product is generated by a carry-maskable adder whose final product is generated by a carry-maskable adder.
Syeda Zeenath Unnisa, K. Lakshmi· International Journal of Eng...· 0 citations
This paper presents X3S, a work-in-progress 32-bit pipelined RISC-V softprocessor core originally developed as author's engineering thesis, which adopts a simple three-stage pipeline intended to balance architectural clarity, implementation complexity, and achievable operating frequency on Field Programmable Gate Array...
Jan Ber· WiPiEC Journal - Works in Pr...· 0 citations
Sharing analog integrated circuit designs remains difficult: foundry non-disclosure agreements restrict the process details a design depends on, and the testbenches behind published results are rarely released. We present analog-db, an open-source, versioned database built on a shareable design representation. A domain...
Shem is presented, a framework that enables gradient-based optimization of system-level objectives such as robustness and accuracy on user-defined analog compute models and introduces an autoparallelization algorithm that reduces total optimization runtime by 49–91%.
Yu-Neng Wang, Sara Achour· International Conference on...· 0 citations
A brief examination of analog computation employing the novel use of second-generation voltage conveyors (VCII), providing empirical evidence of the viability and precision of analog computation employing voltage conveyors.
Ankit Kumar Gaur, M. Verma, D. Vaithiyanathan· Analog Integrated Circuits a...· 0 citations
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