TL;DR
An adaptive ansatz construction and optimization method that simultaneously optimizes expressibility, entanglement capability, and circuit depth while balancing these performance metrics, enabling task-oriented ansatz design and circuit optimization.
Numerical results show that the learned architectures recover known benchmark strategies, adapt to dephasing noise, and outperform fixed hardware-efficient ans\"atze while using fewer entangling gates, establishing AutoQSense as a resource-aware approach to adaptive and hardware-compatible quantum sensing.
The increasing complexity of 5G and emerging 6G wireless networks has intensified the need for scalable optimization techniques capable of addressing computationally challenging combinatorial problems. While quantum optimization offers a promising alternative, current near-term quantum hardware remains limited by qubit...
Training parameterized quantum circuits requires balancing optimization progress with limited evaluation budgets and the statistical uncertainty of near-term quantum hardware. We present a modular benchmarking framework that separates quantum search-direction estimation from classical parameter-update rules, allowing t...
Quantum-inspired evolutionary optimization (QIEO) represents design variables as a set of qubits and searches a continuous, multi-dimensional landscape through rotation of the qubit's amplitude pair. Every generation rotates those amplitudes toward a single elite, which corresponds to that generation's best. The update...
In variational quantum optimization methods, the manner in which classical data are embedded into the quantum circuit significantly influences the representational capacity and solution behavior of the model. In the literature, this aspect is generally considered a secondary component. In this study, the effect of a th...
A novel hypercube-encoded quantum-inspired optimization framework is proposed to formulate the synthesis task as a trajectory-finding process, offering an effective, low-cost, and highly scalable avenue for reversible circuit synthesis.
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