NPSIM: A Tick-Accurate CPU–NPU Simulator for Scheduling Analysis of CNN Applications

Abstract

Applied Artificial Intelligence (AI) is increasingly used in emerging autonomous systems such as self-driving vehicles, drones, and robotics, where perception and decision-making rely on deep learning models, notably Convolutional Neural Networks (CNNs). These applications operate under strict timing constraints, as meeting inference deadlines is essential to ensure efficiency, safety, and robustness in dynamic environments. To accelerate inference on embedded platforms, GPUs are progressively being replaced by Neural Processing Units (NPUs), which are better suited to resource-constrained environments. However, NPU architectures are typically throughput-oriented, rely on non-preemptive execution, and lack native real-time guarantees. As a result, their timing behavior is difficult to predict, significantly complicating their integration into real-time autonomous systems and the enforcement of end-to-end deadline constraints. Moreover, existing real-time simulation and scheduling analysis tools fail to accurately capture the specific execution characteristics of CPU–NPU architectures, particularly the layer-level execution of CNNs and the possible parallel execution of layers belonging to different CNNs. Consequently, system designers lack appropriate tools to explore scheduling strategies and assess system-level schedulability under realistic architectural constraints. To address these challenges, we propose npsim, a tick-accurate CPU–NPU simulator dedicated to the scheduling analysis of CNN-based applications. npsim models the detailed timing behavior of heterogeneous AI workloads, including non-preemptive NPU execution, data-transfer delays, and layer-level CNN execution. It provides a realistic environment for exploring scheduling policies and analyzing the trade-off between CNN result accuracy and system schedulability. Its lightweight design further enables easy integration into the development workflow of commercial NPUs, such as the NXP Neutron NPU.