Analog Neuromorphic Circuit for Modeling Astrocyte Dynamics
Abstract
This paper presents a low-power analog implementation of astrocyte dynamics using a simplified Postnov model. The proposed circuit employs floating-gate MOS transistors, which are well-suited for low-voltage, low-power neuromorphic VLSI systems. The architecture consists of two interconnected subcircuits that emulate the internal state and output behavior of the astrocyte model. The proposed design reproduces astrocytic dynamics in real time, closely matching the temporal behavior observed in biological systems. Simulations are performed using HSPICE in a $0.18~\mu $ m CMOS process. Results demonstrate that the circuit effectively mimics key astrocytic dynamics, including response timing and output patterns. These findings highlight the circuit’s potential for integration into large-scale neuromorphic architectures, providing a scalable and energy-efficient solution for modeling glial contributions to neural computation. The work establishes a foundation for future hardware implementations of astrocyte-inspired neuromorphic systems and provides a platform for exploring astrocyte function and their potential roles in neurological and biomedical applications.