Dr. Srinivasa Reddy Dumpa, B. Radhika, A Aishwarya

Area–Delay–Power Efficient FPGA Architecture for Real-Time Impulse Noise Removal Using Decision-Based Multiplexers and Adaptive Neighborhood Median Filtering

Real-time image denoising requires a filtering architecture that simultaneously preserves image structure and satisfies strict hardware constraints on area, latency, and power. This paper presents an FPGA-oriented real-time impulse noise removal (RTINR) architecture built around a decision-based multiplexer and an adap...