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Author

Heping Luo

2 papers indexed here

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Open access Aug 2026

Robust Hybrid Computing-in-Memory System Based on 2T-2C and 4T-2C FRAM Cells

This paper proposes a computing-in-memory (CiM) architecture based on a hybrid 2T-2C/4T-2C ferroelectric random-access memory (FRAM) array that provides ADC-free bitwise computing with binary inputs and outputs, reducing peripheral-circuit overhead and power consumption.

Chen He, Jianjun Li, Wei Li et al. · 0 citations
Conference Open access Jul 2026

FeFET-embedded CMOS Circuit Design for Processing-in-memory Adder

Novel FeFET-embedded Complementary Metal-Oxide-Semiconductor (CMOS) adders for efficient Processing-in-Memory (PiM) that enables Analog-to-Digital Converter (ADC)-free arithmetic operations by integrating data storage and logic within a hybrid circuit structure is proposed.

Chen He, Wei Li, Jianjun Li et al. · 0 citations

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