Author

Mahmud Esad Arar

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Open access Aug 2026

Real-Time Super-Resolution for Drone Imagery: A Low-Power, Low-Precision Approach with Hardware Acceleration

Results show that a twenty-three-layer residual SR network can be deployed within a 5.38 W envelope on a low-cost integer-only edge FPGA, making the approach suitable for autonomous systems, robotics, and airborne surveillance.

G. Tatar, Mahmud Esad Arar · Electronics · 0 citations