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Author

N. Onizawa

2 papers indexed here

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Open access Sep 2026

Differential Stochastic Simulated Annealing Processor for Fully Connected 2048-Spin Optimization

A 2,048-spin fully connected annealing processor based on differential stochastic simulated annealing (DSSA) is presented as an architectural design in TSMC 28 nm CMOS with a 3 mm4 mm post-layout area. The processor closes timing at 500 MHz, integrates a 16 Mb SRAM weight memory, and amortizes stochastic noise across 1...

N. Onizawa, Md Mohaimenul Alam, Sean C. Smithson et al. · 0 citations
Preprint Sep 2026

Error-Rate Reduction in LDPC Decoding via Bit-Aligned Temporal Reinforcement in Parallel Probabilistic-Bit Dynamics

These results show that the computational effect of temporal state depends on the retained quantity and its reinjection into stochastic dynamics, and fixed additive parameter-and-readout packages achieve lower bit- and frame-error rates than separately optimized pSA-specific packages.

N. Onizawa, T. Hanyu · 0 citations

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