Skip to content

Author

R. Prameela

1 paper indexed here

We haven’t gathered this author’s papers yet. Follow them and we’ll fetch their work.

Not the right person? Other researchers publish under this name.

Conference Aug 2026

A Low-Power 4-Bit Vedic Multiplier Utilizing Modified Gdi and Sapon Techniques

In Digital Signal Processing (DSP) and other computational applications, the multiplier is a fundamental building block and efficient design of the multiplier has a significant impact in the enhancement of the performance of Integrated Circuits (ICs). Vedic Multipliers are one of the different types of multiplier archi...

R. Prameela, K. Hemalatha, R. P. Priya et al. · 0 citations

We use cookies to run the site and, with your consent, for analytics and to show ads. See our Cookie Policy.