Skip to content

1 paper indexed here

We haven’t gathered this author’s papers yet. Follow them and we’ll fetch their work.

Not the right person? Other researchers publish under this name.

Open access Sep 2026

A Secure Logic Locking Integration Technique for AES Algorithm

The results indicate that the proposed integration enhances SAT attack resistance while maintaining acceptable hardware overhead, making it suitable for secure IoT hardware deployments.

P. M, S. P · 0 citations

We use cookies to run the site and, with your consent, for analytics and to show ads. See our Cookie Policy.