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Soniya Patel, Mrs. Deepali Sahu, Ms Madhu Vishwaka

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Review Open access Sep 2026

Design and Analysis of Low Power CMOS Full Adders: A Comprehensive Review of Architectures, Logic Styles, and Performance Optimization

The full adder (FA) remains the fundamental arithmetic building block in modern digital systems, serving as the critical component in arithmetic logic units (ALUs), multipliers, and digital signal processors (DSPs) . As CMOS technology continues scaling into the nanometer regime, power dissipation has emerged as the pr...

Soniya Patel, Mrs. Deepali Sahu, Ms Madhu Vishwaka · 0 citations

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