EVALUATING THE EFFECTIVENESS OF ALGORITHMIC NOISE REDUCTION IN POWER SIDE-CHANNEL ATTACKS ON AN FPGA-BASED CGRA CRYPTOGRAPHIC ACCELERATOR SUPPORTING MULTI-TASK AES-128
Power side-channel attacks represent a serious threat to cryptographic accelerators implemented in hardware. This article experimentally evaluates the power side-channel vulnerability of LiCryptor, a CGRA-based cryptographic accelerator, when executing AES-128 in a pipelined, multi-threaded configuration supporting 16...