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Author

Xue-Feng Zou

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Oct 2026

Real-Time FPGA Implementation of a Low-Complexity Time-Frequency Hybrid Equalization Architecture for DP-QPSK Coherent Reception in Datacenter Scale-Across Interconnects

This work presents a real-time coherent receiving algorithm for 32Gbaud low-complexity DP-QPSK signals and deploys it on a single FPGA for datacenter scale-across interconnects. This real-time hardware algorithm, with a 5/4 samples per symbol (SPS) frequency-domain timing recovery algorithm (TR), a 1 SPS frequency-doma...

Kai-Yang Dong, Hong-Yi Gan, Xue-Feng Zou et al. · 0 citations

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