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Author

Yuhua Cheng

2 papers indexed here

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Jan 2026

A 12‐Bit 1‐MS/s 14.96‐ μ W SAR ADC With Improved True Single‐Phase Clock Flip‐Flops

A low‐power 12‐bit 1‐MS/s successive approximation register (SAR) analog‐to‐digital converter (ADC) is presented in this paper. The ADC employs segmented capacitive digital‐to‐analog converter (CDAC) array and improved true single‐phase clock flip‐flops (ITSPCFFs) to reduce power consumption and chip area. The proposed...

Cheng-Long Zhu, Haochuan Wang, Yu Xia et al. · 0 citations
#edge computing Open access Aug 2026

A simple current-controlled second-order memristor model and its third neuronal circuit implementation

This paper proposes a simple current-controlled second-order LAM mathematical model, which exhibits both negative differential resistance edge of chaos (EOC) domains and positive differential resistance (PDR) EOC domains, and constructs a minimalist third-order neuronal circuit by simply paralleling the LAM with a capa...

Zhen-Zhou Lu, Xinyi Wang, Zhi Zeng et al. · 0 citations

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