SoK: From Silicon to Netlist and Beyond Two

SoK: From Silicon to Netlist and Beyond

Hardware serves as the root of trust in modern computing systems, making Hardware Reverse Engineering (HRE) essential for security assurance—from design verification and supply-chain integrity to vulnerability discovery. We scope HRE to netlist recovery and its subsequent analysis, spanning the three subdomains of Inte...

Hardware Design and Security in the Era of Chiplets and LLMs

A unified analysis of attacks on chiplet systems, the integration of Large Language Models into Electronic Design Automation (EDA) flows, and how LLM systems can advance hardware security efforts for modern systems, including chiplets is provided.

Firmware Reverse Engineering: A Comprehensive Review and Directions

This review synthesises 118 works published from 2014 to 2026 covering the full firmware reverse engineering pipeline and identifies ten structural gaps, including the absence of unified evaluation benchmarks, fragmented peripheral modelling, the scalability–fidelity trade-off in re-hosting, and insufficient grounding...

POSTER: VibeNIC: Toward LLM-driven Agile Development of FPGA SmartNICs

VibeNIC is a SmartNIC framework co-designed at every layer for an LLM developer, and a case study on a stateful HBM-augmented UDP datapath delivers a working end-to-end design in hours.

Advanced Security through Hardware Capabilities: A Comprehensive Survey on CHERI Technology

As next-generation systems become increasingly complex and interconnected, they face the burden of new and numerous critical security challenges. Capability Hardware Enhanced RISC Instructions (CHERI) has emerged as a promising technology to mitigate memory safety vulnerabilities, one of the major security threats in c...

An Efficient Gate-Level Logic and Structural Analysis Framework for Hardware Trojan Detection