Reconfigurable Voltage-Divider-Based Non-Volatile 8T–2MTJ Bitcell for Ternary Search and Logic-in-Memory Applications

Abstract

This work explores the capability of 8T-2MTJ bitcell, originally investigated for ternary search operation, to support both associative search and In-Memory Computing (IMC) within the same Non-Volatile Ternary Content-Addressable Memory (NV-TCAM) framework. The proposed approach reuses the existing search-line control mechanism of the bitcell and enables reconfigurable T CAM/IMC o peration w ithout m odifying the core cell structure. By appropriately configuring the search-line inputs, the 8T-2MTJ bitcell realizes AND/NAND, OR/NOR, and XOR/XNOR operations while preserving conventional TCAM functionality, including logic ‘0’, logic ‘1’, and ‘don't care’ states. A 4 × 4 array is implemented with write, wordline, and configurable IMC/TCAM mode d rivers, and the bitcell layout is designed in 18 nm FinFET technology with an area of $0.694 \mu \mathrm{m}^{2}$. Circuit-level simulations using a Magnetic Tunnel Junction (MTJ) Verilog-A compact model validate correct write, search, and logic operations. Process-corner and Monte Carlo analyses further demonstrate robust functionality under variation, with sub-nanosecond mean logic delays. These results show that the proposed reconfigurable v oltage-divider-based 8 T-2MTJ bitcell improves hardware utilization by integrating search and logic computation in a compact non-volatile memory platform.